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L2 prefetch enable.

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Hi All,

 

Requirement:

Globally Enable L2 and L1(Dside) Prefetch option

 

I need to confirm that setting L1 prefetch enable in L2 (Pl310 ) ACTLR needs to be done individually for all available arm cores on the system

 

[2]L1 prefetch enable

Dside prefetch.

0 = Disabled. This is the reset value.

1 = Enabled.

[1]L2 prefetch enable

Prefetch hint enable[a]. The reset value is zero

 

 

MRC p15, 0,<Rd>, c1, c0, 1; Read ACTLR

MCR p15, 0,<Rd>, c1, c0, 1; Write ACTLR


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