Hi,
I have seen your exchange with Freescale on their community site. They are correct to refer you to ARM since this erratum refers to the Cortex-A9 processor core and not to any other component of the i.MX part.
The statement about the MMU means that you can protect against this scenario by ensuring that the MMU memory map is configured such that any regions which may be accessed by page table walks or PLD/PLE memory accesses do not generate aborts. In general, it would most likely indicate a serious programming error for any of these scenarios to occur in any case, so it is most likely that your system already conforms to these conditions.
Hope this helps.
Chris
