Can't Get IOPIN, IOSET and IOCLR to work as I want to
Hi allI'm new here in the forum. And I have a question that I have been struggling with for about 5 Days now and I cant get an explanation.I'm trying to interface a push button to p0.7 and have a LED...
View ArticleCache cleaning and invalidating in ARM Cortex-A
Cleaning or invalidating the L1 cache and L2 cache will not be a single atomic operation. A core might therefore perform cache maintenance on a particular address in both L1 and L2 caches only as two...
View ArticleRe: Where can I find code examples / tutorials and getting started guides...
Of course I wanted to write that AT91.com is half dead. Would be nice if people there at Atmel would listen to the users of these devices. We'll be glad to share what info is needed for us to make the...
View ArticleRe: Can't Get IOPIN, IOSET and IOCLR to work as I want to
Make sure pin p1.16, p1.18 is configured as GPIO function and the direction is configured as OutputMaybe you can upload the board schematic and your whole codeBy the way, most push button is pull-up,...
View ArticleCan I measure the power performance of GPU based on Samsung Chromebook2?
Dear All, I want to say really thanks for everyone. Because when I have a question, always this forum give me a precious answer Cut to the chase, I am wondering whether I can measure the power...
View ArticleRe: Can I measure the power performance of GPU based on Samsung Chromebook2?
oh sorry, the other one.. and I am doing OpenCL programming to analyze performance of GPU computation..but is there any solution to vary the number of GPU compute unit? Actually, I can use 2 compute...
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Re: Mali hardware acceleration on ubuntu on Chromebook
While I have upgraded to 14.10 and installed e17 with EGL intact, found the compositor works great in software mode (even better in 14.10 than in 14.04) I found chromium-browser...
View ArticleRe: Mali hardware acceleration on ubuntu on Chromebook
... nobody else can provide the drivers and even regular users need drivers sometimes Strictly speaking there are people downstream of us that could do this (Samsung/Google in this case) but supporting...
View Articlerestriction on Function Code in case of interworking veneers
For the inter-working veneers (for state change ARM-Thumb or vice-versa) there is an interesting restriction (source link) :an ARM-Thumb interworking veneer has a range of 256 bytes and so the function...
View ArticleRe: What ARM MCU manufacturer has the best documentation?
IMHO, STMicro and NXP though I think it may be subjective. For the ARM core, best place is ARM website.Hope it helps.
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Re: Mali hardware acceleration on ubuntu on Chromebook
Well, performance is very good, in spite of something apparently not being configured correctly so it seems to have fallen back to software, now it's clearly not near as snappy as ChromeOS....
View ArticleRe: What ARM MCU manufacturer has the best documentation?
From my experience: because I was familiar with NXP style of 8051 MCU datasheet before, I could simply read NXP M0 datasheet/users manual and sample code/LPCOpen code, to finish my M0 project...
View ArticleRe: What ARM MCU manufacturer has the best documentation?
Freescale Kinetis 32-bit Microcontroller (MCUs) based on ARM Cortex-M Cores may be suitable, you can find lots of documents from its official website.
View ArticleVBIC immediate
I'm looking for the intrinsic that corresponds to VBIC{cond}.datatype Qd, #imm I can't find it and it's not listed as not implemented.
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About AXI4 address channel and data channel handshake sequence
I wonder whether the read/write data channel handshake must occur or assert after the address channel handshake completed?For example the master device will wait ARREADY assert or ARVALID dessert,...
View ArticleRe: ARM microcontrollers in sd cards?
That's quite some little sketch, Alban! It does show the capabilities of the -M4 in this context, and it's tempting to think of it as a bit of a steamroller. The thing is, though, that the SD wallnuts...
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