Time to think about your proposal for ARM TechCon 2015
Proposals are now being accepted for ARM TechCon 2015, which will take place November 10-12, 2015. Designers, engineers, and developers are encouraged to submit their proposals for technical...
View Articlea problem of rcc setting,I am a new learner,thank you very much
Hello everyone, today I want to ask a question about how to set the RCC register. Recently I have learned stm32 from a very basic level. I get to know there are two ways to set RCC register. First I...
View Article大家好，有个关于stm32RCC配置的问题想请教一下大家，谢谢各位
学了stm32一阵子，知道了有两种方法设置时钟。一个是用systemInit()，里面打包好了rcc设置的东西，另外一种途径就是使用st提供的各种RCC函数，一个个rcc寄存器去操作。两种方法最终目的都一样。但这两种方法当中，都有对中断向量表进行配置的语句 #ifdef VECT_TAB_RAM MY_NVIC_SetVectorTable(0x20000000, 0x0); #else
View ArticleRe: ARM/THUMB instructions that change execution path?
Well, the table method doesn't work, I saw that when I got the spreadsheet about the instructions done. When you look at the sheet, you can see that with all the instructions only bits 27, 26 and 25...
View ArticleRe: Re: Instruction timings - arm cortex m3
Hello jensbauer, I revised my results by seeing your comments. I measured NOP cycle and I found there was 7 cycles overhead of result (i.e NOPx16=23 cycles. NOPx32=39 cycles). Also I re-measured the...
View ArticleRe: DS-5 is able to see DAP, but nothing beyond?
Hi, Thanks for the answer. You are right, after re-synthesis, the error is gone. Something wrong with the ROM table.
View ArticleRe: Kernel CL_OUT_OF_RESOURCES problem
Thanks a lot. BTW, is there any way to force the GPU starts all cores, since the power consumption in our application is not a major concern.
View ArticleRe: 大家好，有个关于stm32RCC配置的问题想请教一下大家，谢谢各位
Jonny,你好 系统启动复位时，会自动调用systemInit。这部分是在Reset_Handler中进行的，在startup_stm32fxxxx.s文件中可以找到这部分代码（路径：Drivers\CMSIS\Device\ST\STM32Fxxx\Source\Templates\arm\）。 所以只要你不去修改这部分代码，systemInit肯定会被调用到的。
View ArticleRe: Re: Why or how does SysTick interrupt wakeup the processor?
Hello all, I have gotten the official answer from Freescale AE team. They are as followings.
View ArticleRe: Re: will cortex m3/m4 enter a lockup mode if a serious fault happened...
Hi ghaflims, Yasuhiko-san, FAULTMASK can be set by any privileged software (including privileged thread mode). However, a software need to handle FAULTMASK carefully as this block the HardFault...
View ArticleRe: Instruction timings - arm cortex m3
Thank you, Joseph, this definitely helps a lot in understanding what to do and how to do it. As I understand it, it sounds like it's a good idea to use 16-bit instructions (and align them on a 32-bit...
View ArticlenetX 500 (ARM 926EJ-S)
Hi, I am a beginner and I need know how can I lead with this board (put in a Linux) because I buy it without software. Best regards
View ArticleRe: Failed to create 4096x4096 texture on Mali-400. The app crashes.
Also be aware that there are implementation limits defined for certain features. Did you check the texture dimension limit for that platform ?
View ArticleRe: New Jive APP for ios - missing "Add contact"
Hi Techguyz, Wow, that is sneaky. They have removed the feature to subscribe/follow/add contact for our community platform version. I'm afraid I don't have a solution for now. It looks like we are...
View ArticleRe: Bus error while executing ARMv8 TLB instruction
Hi, Yes I see it in the debugger once I set up the translation table and try to invalidate the current TLB in order to make sure that my settings are flushed and taking effect. I wanted to debug my...
View ArticleRe: ARM/THUMB instructions that change execution path?
When I wrote my 68xxx debugger, the table was fine (though these were only 16-bit words). -But ARM's instruction set is not too complicated either. I have not had a look at Cortex-A yet, but the time...
View ArticleHow to measure program execution time in ARM Cortex-A53 processor?
Hi, I was using following method to read clock in cortex-a15: static void readticks(unsigned int *result) {
View ArticleRe: ARM/THUMB instructions that change execution path?
If you're lucky, you can place instructions that are used often in the beginning of the table
View ArticleBit 22 in some LD/ST instructions (Cortex-A7)
I wonder if the bit 22 has some function in instructions like LDRH, STRH, LDRSBT, LDRD, ... (bits 27, 26, 25 = 0, 0, 0)?
View ArticleRe: Instruction timings - arm cortex m3
Hi Jens, For best performance, in general pipeline LDR and STR are good for Cortex-M3/M4. (Not applicable to Cortex-M0, M0+ , M7) This reduce the subseqence LDR/STR instructions to 1 cycle (assumed 0...
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