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Compile error for core_cm3.c

I'm currently trialing the Keil uVision compiler V5 with the ST demo board MCBSTM32 (uses an STM32F103R8).The Keil IDE indicates that a set of the inline assembler definitions are incorrect. __ASM...

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Re: glBlitFramebuffer from FBO -> Back Buffer leaves trails on Nexus 10

Basically I'm trying to get an existing desktop GL architecture working on ES devices. The way it is setup we have off screen color and depth-stencil surfaces that may or may not be multisampled, and...

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Mali deadlock with X server grab

Hi, We are working with Mali-400 driver r3p2-01rel0 on Exynos4412, running gnome-shell under Linux/X11. base: BUILD=RELEASE ARCH=arch_011_udd PLATFORM=default_7a TRACE=0 THREAD= GEOM= CORES=MALI400...

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Re: Depth texture tiling artefacts on T6xx?

Hi Stephane, Thanks for reporting. > Anything in the sequence of operations described above that may be incompatible with TBDR?No - what you describe should work fine (TBR should be transparent to...

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Re: Depth texture tiling artefacts on T6xx?

Hi Peter, Thanks for the response. Here are the answers to your questions: 1. depth texture contents are sensible but contain the tiling artifacts.2. 1280x8003. 24/8 depth stencil.4. texture...

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how to Mali OpenCL on Android in native way?

I wanna use OpenCL on android phone. I tried to build an excutable binary using   include $(BUILD_EXECUTABLE) with NDK-build, But libOpenCL is needed. How can I get this ?

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Re: On which arm version cores android can run?

George is correct but some ARMv5 and v6 based SoCs (i.e. ARM9 and ARM11) can run older versions of Android.Check out this List of devices: ARMv7, ARMv6, ARMv5 - xda-developersWere you interested in...

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Re: Debug native system-level code (c++) of Android Sources (AOSP) with DS-5

It is possible if you've built your system_process binary with debug flags and load the source in to the debugger. Setting a break point at the entry sequence can be a bit tricky though, e.g. if you're...

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Re: Depth texture tiling artefacts on T6xx?

Hi Stephane,  Thanks for the answers - one of our ecosystem guys will be in touch to see how we could exchange a reproducer. One last question - you mention this is timing sensitive - if you do a...

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What is the difference between DesignStart IP and DesignStart IP for...

I have the allowance to download the IP which is ARM Cortex-M0 Processor DesignStart IP and ARM Cortex-M0 Processor DesignStart IP for University, I want to finger out what's the difference between...

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Re: 3D printing and micro-manufacturing with Robox

Hello, I work with the Robox team, I'd be happy to try and answer any questions you have about the project. Thanks a lot for your comments so far. We create little boxes for electronics all the...

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Re: Why was EGLImage/gbuffer support removed from the Mali Android SDK after...

Hi cgrant78, I would just add that EGLImage is useful for more than just asynchronous upload, for example making image data available to GLES from external sources such as a camera, so it's inclusion...

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Re: Depth texture tiling artefacts on T6xx?

Interestingly, similar artefacts are also visible in the rock above, especially at around (1152,144) and thereabouts. The effect is most visible for pixels to the right of the x=1024 line, but happens...

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Re: How to get Mali GPU's frequency

Hi there, On linux (possibly true for android) you may be able to see the current clock at /sys/class/misc/mali0/device/clock and dvfs setting at /sys/class/misc/mali0/device/dvfs, but only if the...

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Re: A question about using CMSIS UART Driver

hi, you fail to initialize properly the uarttake a look at this code:     ARM_UART_STATUS status;  status = Driver_UART1.Initialize(NULL, 0);  status = Driver_UART1.PowerControl(ARM_POWER_FULL);...

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Re: Depth texture tiling artefacts on T6xx?

Hi Sean and Peter, Thank you both for your answers! Peter, I was misled to believe it was timing sensitive due to the artifacts depending on the on screen animation. Sean, interesting observation on...

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Re: Depth texture tiling artefacts on T6xx?

Hi Stephane,> The depth of field pass was sampling from and rendering to the same render target which seems to be what was introducing the corruption I'll need to reread the spec when I get back in...

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Re: Max burst lengths for AXI4 - why only 16 for FIXED, WRAP?

Like most specs I suspect it's an arbitrary limit which meets the requirements and use cases, and keeps the hardware a bit smaller / lower power than a bigger arbitrary number. Many of the burst sizes...

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A question about compiler the Linux project for DS-5.

I have a Linux project , and I want to build this project for DS-5.I import the project like the following picture.And choose the Toolchain for indexer settings like the following picture.After import...

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Re: About the Global Task Scheduling of the big.LTTILE MP, I do not...

I agree with Pete above - the OS will move openMP threads to big or LITTLE cores based on dynamically measured performance and load history for that thread. A few other points on OpenMP that might be...

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